Wireless data transmission is now widely used in the fields of vehicle monitoring, remote control, small wireless networks, small wireless data terminals, etc. Wireless data transmission is mainly composed of data terminals, mainframes and main control machines, and serial communication between the main control unit and the host. Port communication, communication between the host and the data terminal through the RF module.
The sensor collects the signal and transmits it to the data terminal. The terminal transmits the wireless data through the RF module. The communication between the main control unit and the data terminal is converted into communication between the main control unit and the host serial port (UA RT) and the data terminal is transmitted through the wireless data. The data transmission between the module and the host forms a software and hardware system for the processor of the Wireless Distribated Sensor/Control Networks (WDSCN). The processing system for wireless data transmission is implemented by an embedded system supplemented by an appropriate wireless data transmission module. The system uses the RF module to complete the data transmission, and uses the embedded system to realize the tasks of processing and storage of transmission data, network communication, and external control.
1 RF module designThe main function of the RF module is completed by the wireless transceiver chip nRF401 with peripheral circuits. The internal structure of the module is divided into transmitting circuit, receiving circuit, mode and low power control logic circuit and serial interface.
The transmitting circuit has a radio frequency power amplifier (PA), a phase locked loop (PLL), a voltage controlled oscillator (VCO), a frequency synthesizer, and the like. The reference oscillator uses an external crystal oscillator to generate the reference frequency required by the circuit. The oscillating circuit adopts a phase-locked loop method, which consists of a frequency synthesizer based on the DDS, an external passive loop filter and a voltage controlled oscillator. The oscillator consists of an on-chip oscillator circuit and an external LC tank. The data to be transmitted is input through the DIN terminal.
The receiving circuit is composed of a low noise amplifier (LNA), a mixer, an intermediate frequency amplifier, a GFSK demodulator, a filter and the like. The output signal of the intermediate frequency amplifier is sent to the GFSK demodulator for demodulation after being demodulated by the intermediate frequency filter. The digital signal is output on the DOUT side.
The chip contains a transmit power amplifier, a low noise receive amplifier, a crystal oscillator, a phase-locked loop, a voltage-controlled oscillator, a mixer, etc., operating at 433 MHz in the ISM band, using FSK modulation and demodulation, crystal oscillation, and PLL. The frequency synthesis technique has a receiving sensitivity of -105 dBm, a transmit power of 10 dBm, and a standby current consumption of only 10 μA. In the receive mode, the RF input signal is amplified by a low noise amplifier, converted by a mixer, amplified and filtered before being sent to the demodulator, and the demodulated digital signal is output at DOUT. In the transmit mode, the output signal of the voltage controlled oscillator is directly fed to the power amplifier, and the digital signal input at the DIN terminal is frequency shifted and keyed and fed to the power amplifier output. The circuit of the RF module is shown in Figure 1.
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