Elpida Completes State-of-the-Art 25nm DDR3 Memory Manufacturing Technology

Elpida Japan announced today that it has manufactured 2Gb (or 128MB) capacity DDR3 SDRAM memory chips using the industry's most advanced 25nm CMOS process.

Elpida claims that the chip area of ​​this 2Gb DDR3 memory chip is the smallest in the world, but no specific figures have been released. The chip data bandwidth x4-bit/x8-bit, data transfer rate up to 18666Mbps or higher (that is, the operating frequency 1866 + MHz), operating temperature range 0-95 °C, power supply voltage 1.5V or 1.35V, can be made of high performance DDR3-1866 or low voltage DDR3L-1600 memory.

Compared to the previous 30nm process, Elpida's newly developed 25nm process requires a 30% reduction in memory cell space per bit and a 30% increase in chip-cuts across the entire wafer.

In addition, with a 15% operating current saving and 20% standby current saving, Elpida's 25nm process can also effectively reduce memory power consumption and contribute to energy saving and environmental protection.

Elpida will begin mass production of this 25nm 2Gb DDR3 SDRAM memory chip in July this year, and plans to mass production of 4Gb large capacity models by the end of this year, wafer production capacity can be significantly increased by 44%, in addition the new process will also be used for mobile Mobile RAM.